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Model Based Design for Real Time Multicore Embedded Platforms in Industrial Motion Control System

Financement: External Organisation Funding
Date de début: 15 février 2019
Date de fin: 30 avril 2021


The research activity focuses on the redesign of the firmware architecture of the existing Robox-designed R execution environment. The innovative aspects of the project are the use of a model-based design language (MBD) from the early design stages and support of multi-core processors. The MBD will not be used as an implementation language due to real-time performance considerations. Instead, its main application areas will be:

  • Test different design choices before their implementation.
  • Perform timing analysis of the new firmware architecture.
  • Provide a formal architectural reference for the implementation.

The design activity can be divided into two parts:

1. Analysis of existing system and new user requirement

  • Thorough analysis of the existing design, focusing on components essential for the new design, and identification of critical points in the existing design that may have negative impacts on the performance.
  • Gathering and discussion of new and changed user requirements, with respect to the existing design.

2. Design of the new firmware architecture and validation by simulation

  • Re-design of the Robox firmware architecture for multi-core platforms, based on the analysis of the existing system and the new user requirements. The new design will be formally specified with the CPAL model-based design language.
  • Exploration and comparison of different design alternatives by means of the simulation capability provided by the CPAL execution engine, with key timing information (such as task cycle time, deadline, execution time, etc) provided by Robox.
  • Analysis and confirmation of design scalability, especially task scheduling and synchronization, to 2-, 4-, and 8-core processors by means of the multi-interpreter feature of CPAL, exploiting our past experience with multisource software on multicore ECUs. This activity will be carried out based on the information of selected candidate scheduling policies and synchronization mechanisms.